EVN MkIV Correlator

The EVN MkIV correlator at JIVE consists of 4 VME based crates each populated with 8 correlator boards and a Real Time Processor board in the front and 2 input boards and a control board in the back.

Correlator board

Each correlator board contains 32 of the VLSI correlator chips designed at the Haystack observatory and implemented at the University of New Mexico. Each board has access to sixty four 2-bit data streams at a rate of 32 Msample/s. With the correlator chips connected in series, each board yields 16384 lags. It supports up to 120 channel baselines, processing at 32 Msamples/s/baseline.

The VLSI correlator chip forms the heart of the correlator system. This full-custom CMOS VLSI chip features 512 lags, which can be rearanged internally into 16 real or 8 complex independent correlator cells with respectively 32 or 16 lags. It operates at 32 MHz clock rate.

Each of the 8 complex correlator sections include a buffer that allows capture of station-based processing parameters embedded in the serial-data streams from the Station Units. The data captured in these buffers allows the necessary phase/delay parameters to be computed and applied to the data.